This is the third part of a series of articles on VHDL arbiters.
On the first part, we commented what a VHDL arbiter is.
On the second part, we saw the VHDL code for a fixed priority VHDL arbiter.
When I talked about what a VHDL arbiter is, I gave the example of the single car we have at home, and how I have to decide who gets to use the car on next Friday evening. In a typical situation, if both children ask for the car, the first thing they will account for is, who got the car the last time.
An arbiter is a very common block used on HW designs.
I think I can find the best example of an arbiter at home. I have only one car, and two young kids, both of them with their own driving licenses. On Friday and Saturday evenings, there will be usually a conflict over who gets to use the car. Usually it falls on me to arbiter who gets the car. Not an easy task.
Audi announced its piloted driving technology at CES 2015. The Audi Prologue includes the Advanced Driver Assistance System Platform (zFAS), co-developed with TTTech.
The zFAS board is based on four devices: an Nvidia k1 processor and Infineon Aurix processor, Mobileye’s EyeQ3 for vision processing, and an Altera Cyclone V FPGA which provides sensor fusion, combining data from multiple sensors in the vehicle for highly reliable object detection and Deterministic Ethernet communications used to transport high bandwidth data within the vehicle.
VHDL is a strong typed language. It is also a language which has quite a long history. These two facts together make handling of signed and unsigned numbers quite confusing. Even today I see lots of code examples with incorrect treatment of signed and unsigned arithmetic.
Part of the history of the VHDL language is the std_logic_arithlibrary. This library is a non-standard library, or maybe I should say de-facto standard library, created by Sinopsis. I recommend not to use it, since there is an ieee library for arithmetic operations today, ieee.numeric Continue reading “Signed, unsigned and std_logic_vector”→
The code snippets list is updated. Each example includes source code and testbench (downloadable). Now there are also proposals of exercises for you to solve. So if you were thinking what projects to make to enhance your VHDL knowledge, these exercises could be a nice option to try.
This book was published by Xilinx in 2005. While in our very dynamic profession, some of the technologies explained can be a bit outdated, the basic concepts are there for anyone who wishes to learn or refresh his/her concepts about high speed serial links.