Be warned. This post has nothing to do with FPGAs whatsoever. Or at least, not that I know of.
I grew up with many hobbies: electronics, astronomy, rocketry, air and plastic models… Much of my childhood days, and also of later days, were spent building and enjoying some things… and also dreaming of many things that I never built and probably never will.
But to stop dreaming is to stop living. When I saw this fabulous kite, I knew that I HAVE to build something similar one day.
The Zynq Book is dedicated to the Xilinx Zynq-7000 System on Chip (SoC) from Xilinx.
The Zynq Book is the first book about Zynq to be written in the English language. It has been produced by a team of authors from the University of Strathclyde, Glasgow, UK, with the support of Xilinx. The book is intended for people just starting out with Zynq, and engineers already working with Zynq.
The first in the projects for the BeMicro CV board will be a HW LED flasher. Although the design is very easy, it is a complete design including absolutely all the elements needed to achieve a reliable design with timing closure.
For an introduction about the Be Micro CV evaluation board, please refer to this post.
What will the project do:
Flash a sequence of LEDs by dividing the clock input
Make a ‘lamp test’ (all LEDs lit) when reset is pressed
LEDs sequence is accelerated if the user presses the second push button on the board.
A good VHDL editor is terribly important during all the phases of your design cycle.
Both Altera Quartus and Modelsim simulator include their own VHDL editors. Both tools include syntax highlighting. In the case of Altera Quartus editor, there is a very useful feature which is the possibility of entering templates for commonly used code blocks (entity, architecture, component) and also for design units (counters, registers, memories, etc.).
“Making FPGA prototyping part of the design process early means actually thinking about how the design will be prototyped via an FPGA“.
In Prototypical – The Emergence of FPGA prototyping for SoC Designis book, the authors tell the history of FPGA-based prototyping and three leading system providers – S2C, Cadence, and Synopsys. First, the book describes how the need for co-verification evolved with chip complexity, where FPGAs got their start in verification, and why ASIC design benefits from prototyping technology.
The Stratix® 10 MX DRAM system-in-package (SiP) family combines a 1 GHz high-performance monolithic FPGA fabric, state-of-the-art Intel Embedded Multi-die Interconnect Bridge (EMIB) technology, and High Bandwidth Memory 2 (HBM2), all in a single package (SiP).