MIF_Gen – A Matlab Utility

matlab_mif_gen

Many times I find myself in the need of generating data for testing. We need data for verification, either done on simulation or on the real target.

One easy way to test our system is to generate data vectors on RAM. Altera RAM IP includes the ability to initialize RAM contents during power-up by means of a .hex file.

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Introducing the Spartan 3E FPGA and VHDL – free book

spartan3EAuthor Mike Fields wrote this book as an introduction to FPGAs and VHDL. The book examples are mainly oriented to Xilinx Spartan 3E FPGA (but as in other books, the concepts are general. If you don’t have that FPGA, adapting the book examples to your own device can be an excellent way to learn).

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The Zynq Book – free

zynqbook

The Zynq Book is dedicated to the Xilinx Zynq-7000 System on Chip (SoC) from Xilinx.

The Zynq Book is the first book about Zynq to be written in the English language. It has been produced by a team of authors from the University of Strathclyde, Glasgow, UK, with the support of Xilinx. The book is intended for people just starting out with Zynq, and engineers already working with Zynq.

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VHDL editors – Notepad++

A good VHDL editor is terribly important during all the phases of your design cycle.

Both Altera Quartus and Modelsim simulator include their own VHDL editors. Both tools include syntax highlighting. In the case of Altera Quartus editor, there is a very useful feature which is the possibility of entering templates for commonly used code blocks (entity, architecture, component) and also for design units (counters, registers, memories, etc.).

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Prototypical – FPGA prototyping free book

Prototypical cover front

Making FPGA prototyping part of the design process early means actually thinking about how the design will be prototyped via an FPGA“.

In Prototypical – The Emergence of FPGA prototyping for SoC Designis book, the authors tell the history of FPGA-based prototyping and three leading system providers – S2C, Cadence, and Synopsys. First, the book describes how the need for co-verification evolved with chip complexity, where FPGAs got their start in verification, and why ASIC design benefits from prototyping technology.

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