Xilinx announces new RFSoC devices

On February 21st Xilinx announced new devices aimed for the design of solutions for 5G wireless systems. The announced RFSoC devices will combine existing MPSoC capabilities with integrated ADCs and DACs.

The integrated 16nm-based RF data conversion technology includes:

  • Direct RF sampling
  • 12-bit ADCs at up to 4GSPS, with digital down-conversion
  • 14-bit DACs at up to 6.4GSPS, with digital up-conversion

Current solutions for SDR are typically based on superhet transceivers. This architecture needs:

  • IF stage including LO
  • High speed converters, typically needing fast SerDes (JESD204) to interconnect the processing FPGA to the ADC and DAC

Direct RF Sampling Receiver – Source: Xilinx

Xilinx proposed architecture with integrated DAC and ADC as well as direct RF sampling simplifies and enhances the SDR solution implementation:

  • Reduced noise
  • Reduced power consumption
  • Reduced PCB size and routing complexity

As of the date of this article, there is no public information regarding availability dates and/or device types for the new RFSoCs.

TI power solution for Arria 10 GX

ti_arria_power

“Field programmable gate arrays (FPGAs) are increasingly complex system on chips (SoCs) that include not just programmable logic gates and random access memory (RAM) but also analog-to-digital converters (ADCs); digital-to-analog converters (DACs); and programmable analog features and signal-conditioning circuits that enable high-performance digital computations in servers, network-attached storage (NAS), enterprise switches, oscilloscopes, network analyzers, test equipment and software-defined radios.”

Continue reading “TI power solution for Arria 10 GX”

Linear Power Solutions for FPGAs

Aria10_GX_FPGA_Development_Kit_1
Altera Arria 10 Evaluation board – Source: Linear

Modern FPGA devices are quite complex machines. They include support for several type of I/Os at different voltages (LVCMOS, LVDS, SSTL, etc). Also, the FPGA core usually works at low voltages of around 1.0V, but at quite high currents of several amperes. Additionally, power sequencing requirements must be met.

Continue reading “Linear Power Solutions for FPGAs”

Lattice Crosslink devices bridge the gap for VR solutions

crosslink

“The pieces are falling into place for the Virtual Reality (VR) market. As designers move to higher bandwidth designs, integrate higher resolution displays, reduce system latency, and improve gesture and head tracking, they are beginning to deliver truly immersive experiences to VR users”

Continue reading “Lattice Crosslink devices bridge the gap for VR solutions”

Stratix 10MX – High memory bandwidth on SiP package

 

The Stratix® 10 MX DRAM system-in-package (SiP) family combines a 1 GHz high-performance monolithic FPGA fabric, state-of-the-art Intel Embedded Multi-die Interconnect Bridge (EMIB) technology, and High Bandwidth Memory 2 (HBM2), all in a single package (SiP).

stratix_mx10
Image source: Altera

Continue reading “Stratix 10MX – High memory bandwidth on SiP package”

Internet of Things (IoT) – Overview whitepaper

IOT3

Understanding the Issues and Challenges of a More Connected World

by Karen Rose
Senior Director, Strategy & Analysis

Reproduced from the Internet Society

Promising to transform the ways we live, work, and play, the Internet of Things (IoT) offers impressive benefits but presents significant challenges.

Continue reading “Internet of Things (IoT) – Overview whitepaper”

Altera FPGA at the wheel of an Audi A8

Audi announced its piloted driving technology at CES 2015. The Audi Prologue includes the Advanced Driver Assistance System Platform (zFAS), co-developed with TTTech.

The zFAS board is based on four devices: an Nvidia k1 processor and Infineon Aurix processor, Mobileye’s EyeQ3 for vision processing, and an Altera Cyclone V FPGA which provides sensor fusion, combining data from multiple sensors in the vehicle for highly reliable object detection and Deterministic Ethernet communications used to transport high bandwidth data within the vehicle.

The zFAS board receives and processes data from:

Continue reading “Altera FPGA at the wheel of an Audi A8”

Intel announces Xeon processor with FPGA accelerator

xeon_fpga
Image source: Altera

Last year (December 2015), Intel completed the acquisition of Altera. As a result of this acquisition, the integration of processor and FPGA on a single chip is finally becoming a reality.

Intel envisions many applications for this combination of processor and FPGA. The FPGA will fulfill accelerator tasks, either by static configuration or dynamic reconfiguration.

Continue reading “Intel announces Xeon processor with FPGA accelerator”