On February 21st Xilinx announced new devices aimed for the design of solutions for 5G wireless systems. The announced RFSoC devices will combine existing MPSoC capabilities with integrated ADCs and DACs.
The integrated 16nm-based RF data conversion technology includes:
Direct RF sampling
12-bit ADCs at up to 4GSPS, with digital down-conversion
14-bit DACs at up to 6.4GSPS, with digital up-conversion
Current solutions for SDR are typically based on superhet transceivers. This architecture needs:
IF stage including LO
High speed converters, typically needing fast SerDes (JESD204) to interconnect the processing FPGA to the ADC and DAC
Direct RF Sampling Receiver – Source: Xilinx
Xilinx proposed architecture with integrated DAC and ADC as well as direct RF sampling simplifies and enhances the SDR solution implementation:
Reduced power consumption
Reduced PCB size and routing complexity
As of the date of this article, there is no public information regarding availability dates and/or device types for the new RFSoCs.
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