Xilinx announces new RFSoC devices

On February 21st Xilinx announced new devices aimed for the design of solutions for 5G wireless systems. The announced RFSoC devices will combine existing MPSoC capabilities with integrated ADCs and DACs.

The integrated 16nm-based RF data conversion technology includes:

  • Direct RF sampling
  • 12-bit ADCs at up to 4GSPS, with digital down-conversion
  • 14-bit DACs at up to 6.4GSPS, with digital up-conversion

Current solutions for SDR are typically based on superhet transceivers. This architecture needs:

  • IF stage including LO
  • High speed converters, typically needing fast SerDes (JESD204) to interconnect the processing FPGA to the ADC and DAC

Direct RF Sampling Receiver – Source: Xilinx

Xilinx proposed architecture with integrated DAC and ADC as well as direct RF sampling simplifies and enhances the SDR solution implementation:

  • Reduced noise
  • Reduced power consumption
  • Reduced PCB size and routing complexity

As of the date of this article, there is no public information regarding availability dates and/or device types for the new RFSoCs.

FPGAs and Deep Machine Learning

machine-learning

The concept of machine learning is not new. Attempts at systems emulating intelligent behavior, like expert systems, go as far back as the early 1980’s. And the very notion of modern Artificial Intelligence has a long history. The name itself was coined at a Dartmouth College conference (1956), but the idea of an “electronic brain” was born together with the development of modern computers. AI as an idea accompanies us from the dawn of human history.

Three latest development are pushing forward “Machine Learning”:

  • Powerful distributed processors
  • Cheap and high volume storage
  • High bandwidth interconnection to bring the data to the processors

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Linear Power Solutions for FPGAs

Aria10_GX_FPGA_Development_Kit_1
Altera Arria 10 Evaluation board – Source: Linear

Modern FPGA devices are quite complex machines. They include support for several type of I/Os at different voltages (LVCMOS, LVDS, SSTL, etc). Also, the FPGA core usually works at low voltages of around 1.0V, but at quite high currents of several amperes. Additionally, power sequencing requirements must be met.

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Introducing the Spartan 3E FPGA and VHDL – free book

spartan3EAuthor Mike Fields wrote this book as an introduction to FPGAs and VHDL. The book examples are mainly oriented to Xilinx Spartan 3E FPGA (but as in other books, the concepts are general. If you don’t have that FPGA, adapting the book examples to your own device can be an excellent way to learn).

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The Zynq Book – free

zynqbook

The Zynq Book is dedicated to the Xilinx Zynq-7000 System on Chip (SoC) from Xilinx.

The Zynq Book is the first book about Zynq to be written in the English language. It has been produced by a team of authors from the University of Strathclyde, Glasgow, UK, with the support of Xilinx. The book is intended for people just starting out with Zynq, and engineers already working with Zynq.

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Prototypical – FPGA prototyping free book

Prototypical cover front

Making FPGA prototyping part of the design process early means actually thinking about how the design will be prototyped via an FPGA“.

In Prototypical – The Emergence of FPGA prototyping for SoC Designis book, the authors tell the history of FPGA-based prototyping and three leading system providers – S2C, Cadence, and Synopsys. First, the book describes how the need for co-verification evolved with chip complexity, where FPGAs got their start in verification, and why ASIC design benefits from prototyping technology.

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High Speed Serial I/O – free book

xilinx_hs_book

 

This book was published by Xilinx in 2005. While in our very dynamic profession, some of the technologies explained can be a bit outdated, the basic concepts are there for anyone who wishes to learn or refresh his/her concepts about high speed serial links.

Inside the book you will find data about:

  • Serdes transceivers basics
  • 8b/10b, 64b/64b encoding
  • Clock recovery
  • Line equalization
  • Channel Bonding
  • Signal Integrity
  • Power considerations
  • Board design considerations, etc.

Book Title: High Speed Serial I/O made simple